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Intel386™ EX EMBEDDED MICROPROCESSOR USER’S MANUAL
14-2
14.2 CSU UPON RESET
Upon reset of the processor, only the UCS channel is enabled and all other chip-selects are dis-
abled. UCS is enabled for the entire memory space of the processor.
The UCS region is initialized upon reset with the following settings:
• Mask set to 7FFFH (CM25:11 in UCSMSKH and UCSMSKL registers)
• CMSMM set
• 16-bit bus size
• Memory access
• External READY# ignored
• 15 wait states
With all the UCS mask bits set to 1, the UCS# pin is active for the entire 64 MBytes of the pro-
cessor’s memory address space. The UCS region can be programmed for a smaller size during
initialization. Normally, UCS# is used to select non-volatile memory devices, such as ROM and
FLASH, at the top of the memory address space so that the processor can fetch the first instruction
from address 3FFFFF0H after RESET. If the Port92 CPU-only RESET is used (described in
Chapter 5), the UCS channel must remain enabled for the top of the memory address space (a
CPU-only RESET does not affect the chip-select registers) and therefore, the UCS channel does
not re-initialize to its reset state.
14.3 CSU OPERATION
Each chip-select channel functions independently. The following sections describe chip-select
channel address blocks, system management mode support, and bus cycle length and bus size
control.
14.3.1 Defining a Channel’s Address Block
A 15-bit channel address and mask are used to specify a channel’s active address block. When
the processor accesses an address in memory or I/O, the upper 15 bits of the address are compared
to the chip-select channel address and OR’d with the channel mask. This means that the CSU
compares the channel address and ORs the channel mask to A25:11 for memory addresses and
A15:1 for I/O addresses. Ones in the channel’s mask exclude the corresponding bits from address
comparisons. Figure 14-1 shows the logic for determining address equality.