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11-7
ASYNCHRONOUS SERIAL I/O UNIT
Figure 11-3. SIO
n
Transmitter
The transmitter contains a transmitter empty (TE) flag and a transmit buffer empty (TBE) flag.
At reset, TBE and TE are set, indicating that the transmit buffer and shift register are empty. Writ-
ing data to the transmit buffer clears TBE and TE. When the transmitter transfers data from the
buffer to the shift register, TBE is set. Unless new data is written to the transmit buffer, TE is set
when the transmitter finishes shifting out the shift register’s contents.
The transmitter’s transmit buffer empty signal can be connected to the interrupt control and DMA
units. Figure 11-4 shows the process for transmitting data.
TXD
n
(pin mux)
Baud-rate
Clock
SIO
n
Transmit Shift
Register
SIO
n
Transmit Buffer
A2326-01
S
y
s
t
e
m
B
u
s
Transmit Buffer Empty
(To ICU and DMA)