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8-9
CLOCK AND POWER MANAGEMENT UNIT
8.3.1 Idle Mode
Idle mode freezes the core clocks (PH1C low and PH2C) high, and leaves the peripheral clocks
(PH1P and PH2P) toggling. To enter idle mode:
1. Program the PWRCON register (Figure 8-5).
2. Execute a HALT instruction.
3. The CPU enters idle mode when READY# terminates the halt bus cycle.
NOTE
CLKOUT continues to run while the CPU is in idle mode.
Figure 8-6. Timing Diagram, Entering and Leaving Idle Mode
A2468-02
CLK2
PH2C
PH1 PH2 ?
PH1C
CLKOUT/PH1P
?
PH2P
CLK2
PH2C
PH2 PH1 PH2
PH1C
CLKOUT/PH1P
PH1
PH2P