Filter
Top Products
E-21
INSTRUCTION SET SUMMARY
b = 10 for register with immediate to register
b = 11 for memory with immediate to register.
e. An exception may occur, depending on the value of the operand.
f. LOCK# is automatically asserted, regardless of the presence or absence of the LOCK# prefix.
g. LOCK# is asserted during descriptor table accesses.
Notes h through r apply to Protected Virtual Address Mode only:
h. Exception 13 fault (general protection violation) will occur if the memory operand in CS, DS, ES, FS, or
GS cannot be used due to either a segment limit violation or access rights violation. If a stack limit is
violated, an exception 12 (stack segment limit violation or not present) occurs.
i. For segment load operations, the CPL, RPL, and DPL must agree with the privilege rules to avoid an
exception 13 fault (general protection violation). The segment’s descriptor must indicate “present” or
exception 11 (CS, DS, ES, FS, GS not present.) If the SS register is loaded and a stack segment not
present is detected, an exception 12 (stack segment limit violation or not present) occurs.
j. All segment descriptor accesses in the GDT or LDT made by this instruction will automatically assert
LOCK# to maintain descriptor integrity in multiprocessor systems.
k. JMP, CALL, INT, RET, and IRET instructions referring to another code segment will cause an
exception 13 (general protection violation) if an applicable privilege rule is violated.
l. An exception 13 fault occurs if CPL is greater than 0 (0 is the most privileged level)
m. An exception 13 fault occurs if CPL is greater than IOPL.
n. The IF bit of the flag register is not updated if CPL is greater than IOPL. The IOPL and VM fields of the
flag register are updated only if CPL = 0.
o. The PE bit of the MSW (CR0) cannot be reset by this instruction. Use MOV into CR0 when resetting
the PE bit.
p. Any violation of privilege rules as applied to the selector operand does not cause a protection
exception; rather the zero flag is cleared.
q. If the coprocessor’s memory operand violates a segment limit or segment access rights, an exception
13 fault (general protection exception) will occur before the ESC instruction is executed. An exception
12 fault (stack segment limit violation or not present) will occur if the stack limit is violated by the
operand’s starting address.
r. The destination of a JMP, CALL, INT, RET, or IRET must be in the defined limit of a code segment or
an exception 13 fault (general protection violation) will occur.
s. The instruction will execute in s clocks if CPL
≤ IOPL. If CPL
>
IOPL, the instruction will take t clocks.
† Clock count shown applies if I/O permission allows I/O to the port in virtual 8086 mode. If I/O bit map
denies permission, exception 13 (general protection fault occurs; refer to clock counts for INT 3
instruction.