13-27
SYNCHRONOUS SERIAL I/O UNIT
Initialization routine for Synchronous Serial I/O Port.
Parameters:
Mode Enables receiver and transmitter; Enables TBE and RHBF
interrupts
MasterTxRx Defines whether Tx and/or Rx are in Master Mode
BaudValue Enables Baud-rate generator and sets Baud-rate Value
PreScale 9-bit Clock prescale value
Returns:
None
Assumptions:
PINCFG & SIOCFG should be configured before this is called.
Prescale is only used if SIOCFG.2 is clear.
Syntax:
#define SSIO_TX_MASTR 0x2 // Transmit Master Mode
#define SSIO_RX_MASTR 0x1 // Receive Master Mode
#define SSIO_TX_SLAVE 0 // Transmit Slave Mode
#define SSIO_RX_SLAVE 0 // Receive Slave Mode
#define SSIO_TX_IE 0x20 // Transmit Interrupt Enable
#define SSIO_TX_ENAB 0x10 // Transmitter Enable
#define SSIO_RX_IE 0x2 // Receive Interrupt Enable
#define SSIO_RX_ENAB 0x1 // Receiver Enable
#define SSIO_BAUD_ENAB 0x80 // Enable Baud Rate Generator
#define SSIO_CLK_SERCLK 0x1 // Baud Rate Clocking Source:
// SERCLK = CLK2/4
#define SSIO_CLK_PSCLK 0x0 // Baud Rate Clocking Source:
// PSCLK = (CLK2/2) /
(CLKPRS+2)
InitSSIO (SSIO_TX_IE| SSIO_TX_ENAB | SSIO_RX_ENAB,
SSIO_RX_MASTR | SSIO_TX_SLAVE,
SSIO_BAUD_ENAB,
SSIO_CLK_PSCLK);
Real/Protected Mode:
No changes required.
*****************************************************************************/
void InitSSIO(BYTE Mode, BYTE MasterTxRx, BYTE BaudValue, BYTE PreScale)
{
/*** Set clocking iff either TX or RX is a master ***/
if(MasterTxRx != 0)
{
/* If 0 using PSCLK, therefore set PreScale */
if((_GetEXRegByte(SIOCFG) & BIT2MSK) == 0)
_SetEXRegByte(CLKPRS, PreScale);