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Timer Facilities 6-5
6.2.1 Fixed Interval Timer (FIT)
The FIT provides timer interrupts having a repeatable period. The FIT is functionally similar to an
auto-reload PIT, except that only a smaller fixed selection of interrupt periods are available.
The FIT exception occurs on 0→1 transitions of selected bits from the time base, as shown in
Table 6-2.
The TSR[FIS] field logs a FIT exception as a pending interrupt. A FIT interrupt occurs if TCR[FIE] and
MSR[EE] are enabled at the time of the FIT exception. “Fixed Interval Timer (FIT) Interrupt” on
page 5-23 describes register settings during a FIT interrupt.
The interrupt handler should reset TSR[FIS]. This is done by using mtspr to write a word to the TSR
having a 1 in TSR[FIS] and any other bits to be cleared, and a 0 in all other bits. The data written to
the TSR is not direct data, but a mask. A 1 clears a bit and a 0 has no effect.
Figure 6-4. Programmable Interval Timer (PIT)
0:31 Programmed interval remaining Number of clocks remaining until the PIT
event
Table 6-2. FIT Controls
TCR[FP] TBL Bit
Period
(Time Base Clocks)
Period
(200 Mhz Clock)
0, 0 23 2
9
clocks 2.56 µsec
0, 1 19 2
13
clocks 40.96 µsec
1, 0 15 2
17
clocks 0.655 msec
1, 1 11 2
21
clocks 10.49 msec
0 31