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Debugging 8-1
Chapter 8. Debugging
The debug facilities of the PPC405 include support for debug modes for debugging during hardware
and software development, and debug events that allow developers to control the debug process.
Debug registers control the debug modes and debug events. The debug registers are accessed
through software running on the processor or through a JTAG debug port. The debug interface is the
JTAG debug port. The JTAG debug port can also be used for board test.
The debug modes, events, controls, and interface provide a powerful combination of debug facilities
for a wide range of hardware and software development tools.
8.1 Development Tool Support
The RISCWatch product from IBM is an example of a development tool that uses the external debug
mode, debug events, and the JTAG debug port to implement a hardware and software development
tool. The RISCTrace™ feature of RISCWatch is an example of a development tool that uses the real-
time trace capability of the PPC405.
8.2 Debug Modes
The PPC405 supports the following debug modes, each of which supports a type of debug tool or
debug task commonly used in embedded systems development:
• Internal debug mode, which supports ROM monitors
• External debug mode, which supports JTAG debuggers
• Debug wait mode, which supports processor stopping or stepping for JTAG debuggers while
servicing interrupts
• Real-time trace mode, which supports trigger events for real-time tracing
Internal and external debug modes can be enabled simultaneously. Both modes are controlled by
fields in Debug Control Register 0 (DBCR0). Real-time trace mode is available only if internal,
external, and debug wait modes are disabled.
8.2.1 Internal Debug Mode
Internal debug mode provides access to architected processor resources and supports setting
hardware and software breakpoints and monitoring processor status. In this mode, debug events
generate debug interrupts, which can interrupt normal program flow so that monitor software can
collect processor status and alter processor resources.
Internal debug mode relies on exception handling software at a dedicated interrupt vector and an
external communications path to debug software problems. This mode, used while the processor
executes instructions, enables debugging of operating system or application programs.
In this mode, debugger software is accessed through a communications port, such as a serial port,
external to the processor core.