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2-4 PPC405 Core User’s Manual
User Model
General-Purpose Registers
GPR0
GPR1
GPR31
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Condition Register
CR
Fixed-Point Exception Register
XER
Link Register
LR
Count Register
CTR
Time Base Registers (read-only)
TBL
TBU
SPR 0x001
SPR 0x009
SPR 0x008
TBR 0x10C
TBR 0x10D
Supervisor Model
MSR
Machine State Register
PVR
Processor Version Register
SPR 0x3DA
Exception Handling Registers
Exception Vector Prefix Register
Exception Syndrome Register
EVPR
ESR
SPR 0x3D5
SPR 0x3D4
SPR General Registers
SPRG0
SPRG1
SPRG7
SPR 0x110
SPR 0x111
SPR 0x114
Save/Restore Registers
SRR0
SRR1
SRR2
SRR3
SPR 0x01A
SPR 0x01B
SPR 0x3DE
SPR 0x3DF
SPRG4
SPRG5
SPRG7
SPR 0x104
SPR 0x105
SPR 0x107
SPRG5
SPR 0x106
SPR General Registers (read-only)
SPRG2
SPRG3
SPRG4
SPRG5
SPRG6
SPR 0x112
SPR 0x113
SPR 0x115
SPR 0x116
SPR 0x117
Data Exception Address Register
DEAR SPR 0x3D5
Timer Control Register
TCR
Timer Status Register
TSR
Timer Facilities
Core Configuration Register
CCR0
Figure 2-1. PPC405 Programming Model—Registers
Instruction Address Compares
IAC1
IAC2
IAC3
IAC4
SPR 0x3F4
SPR 0x3F5
SPR 0x3B4
SPR 0x3B5
Debug Registers
Time Base Registers
TBL
TBU
SPR 0x11C
SPR 0x11D
Data Address Compares
DAC1
DAC2
SPR 0x3F6
SPR 0x3F7
Debug Status Register
DBSR
Storage Attribute Control Registers
DCCR
DCWR
SPR 0x3FA
SPR 0x3BA
SPR 0x3BB
ICCR
SGR
SLER
SU0R
SPR 0x3FB
SPR 0x3B9
SPR 0x3BC
Debug Control Registers
DBCR0
DBCR1
SPR 0x3F2
SPR 0x3BD
Data Value Compares
DVC1
DVC2
SPR 0x3B6
SPR 0x3B7
Instruction Cache Debug Data Register
ICDBR SPR 0x3D3
SPR 0x3F0
Memory Management Registers
Process ID
Zone Protection Register
PID
ZPR
SPR 0x3B1
SPR 0x3B0
SPR 0x3B3
SPR 0x3D8
SPR 0x11F
Programmable Interval Timer
PIT
SPR 0x3DB
User SPR General Register 0 (read/write)
USPRG0
SPR 0x100