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Instruction Set 9-35
cmpi
Compare Immediate
cmpi
Compare Immediate
c
0:3
←
4
0
if (RA) < EXTS(IM) then c
0
← 1
if (RA) > EXTS(IM) then c
1
← 1
if (RA) = EXTS(IM) then c
2
← 1
c
3
← XER[SO]
n
← BF
CR[CRn]
← c
0:3
The IM field is sign-extended to 32 bits. The contents of register RA are compared with the extended
IM field, using a 32-bit signed compare.
The CR field specified by the BF field is updated to reflect the results of the compare and the value of
XER[SO] is placed into the same CR field.
Registers Altered
• CR[CR
n
] where
n
is specified by the BF field
Invalid Instruction Forms
• Reserved fields
Programming Note
The PowerPC Architecture defines this instruction as cmpi BF,L,RA,IM, where L selects operand
size for 64-bit PowerPC implementations. For all 32-bit PowerPC implementations, L = 0 is required
(L = 1 is an invalid form); hence for the PPC405 core, use of the extended mnemonic
cmpwi BF,RA,IM is recommended.
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
cmpi BF, 0, RA, IM
11 BF RA IM
0691116 31
Table 9-11. Extended Mnemonics for cmpi
Mnemonic Operands Function
Other Registers
Altered
cmpwi [BF,] RA, IM Compare Word Immediate.
Use CR0 if BF is omitted.
Extended mnemonic for
cmpi BF,0,RA,IM