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9-48 PPC405 Core User’s Manual
dcba
Data Cache Block Allocate
Exceptions
This instruction is considered a “store” with respect to data storage exceptions. However, this
instruction does not cause data storage exceptions or data TLB-miss exceptions. If conditions occur
that would otherwise cause such exceptions, dcba is treated as a no-op.
This instruction is considered a “store” with respect to data address compare (DAC) debug
exceptions. See “Data Storage Interrupt” on page 5-16.
Architecture Note
This instruction is part of the IBM PowerPC Embedded Virtual Environment.