IBM SA14-2339-04 Personal Computer User Manual


 
X-12 PPC405 Core User’s Manual
mtspr 9-119
mulchw 9-121
mulchwu 9-122
mulhhw 9-123
mulhhwu 9-124
mulhwu 9-126
mulhwu. 9-126
mullhw 9-127
mullhwu 9-128
mulli 9-129
mullw 9-130
mullw. 9-130
mullwo 9-130
mullwo. 9-130
N
nand 9-131
nand. 9-131
neg 9-132
neg. 9-132
nego 9-132
nego. 9-132
nmacchw 9-133
nmacchws 9-134
nmachhw 9-135
nmachhws 9-136
nmaclhw 9-137
nmaclhws 9-138
noncritical interrupts
defined 5-5
processing 5-5
nop 9-142
nor 9-139
nor. 9-139
not 9-139
not. 9-139
notation xxii
, 9-2, A-41
notational conventions xxii
O
opcodes A-33
optimization
coding guidelines C-1
alignment C-2
boolean variables C-1
branch prediction C-2
dependency upon CR C-2
floating point emulation C-1
or 9-140
or. 9-140
orc 9-141
orc. 9-141
ori 9-142
oris 9-143
P
page identification fields, UTLB 7-3
performance
DCU
improve with simultaneous caching 4-17
limited by sequential caching 4-18
overview 4-16
improve
through byte-writeability 4-6
lower
from cache-inhibited regions 4-5
PID 10-34
PID (process ID)
illustrated 7-13
PIT 6-4
, 10-35
PIT (programmable interval timer)
interrupts, register settings 5-22
portability, instruction set 9-1
PowerPC architecture 1-3
precise interrupts 5-1
pre-fetch
branches to CTR 2-28
branches to LR 2-28
buffers 2-23
past interrupts 2-28
primary opcodes A-33
priority signal
DCU 4-17
privileged mode
defined 2-30
instructions, listed 2-31
registers 2-4
privileged programming model 2-1
privileged SPRs
instructions for reading 2-32
problem state.
See
user mode
process ID.
See
PID
processor
management instructions 2-42
Processor Version Register.
See
PVR
program interrupts
and TLB 7-11
causes 5-20
ESR usage 5-20
programming note 7-11
register settings 5-21
programmable interval timer 6-4
programming model
features 2-1
programming models
privileged 2-1
user 2-1
programming note
data storage interrupts 5-16
EA access in DCU 4-9
external or timer interrupts 5-18
instruction pipeline 4-15
MSR affected by instructions 5-7
non-supported memory models 4-8
program interrupts 7-11
reserved fields 2-2
RPN field 7-4
synchronizing the ITLB 7-8
pseudocode 9-2
PVR 10-36
PVR (Processor Version Register)
illustrated 2-10
R
real mode