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Instructions by Category B-41
B.11 Cache Control Instructions
Cache control instructions allow the user to indirectly control the contents of the data and instruction
caches. The user may fill, flush, invalidate and zero blocks (16-byte lines) in the data cache. The user
may also invalidate congruence classes in both caches and invalidate individual lines in the
instruction cache.
Table B-12. Cache Control Instructions
Mnemonic Operands Function
Other
Registers
Changed Page
dcba RA, RB Speculatively establish the data cache block which
contains the EA (RA|0) + (RB).
9-47
dcbf RA, RB Flush (store, then invalidate) the data cache block which
contains the EA (RA|0) + (RB).
9-49
dcbi RA, RB Invalidate the data cache block which contains the EA
(RA|0) + (RB).
9-50
dcbst RA, RB Store the data cache block which contains the EA
(RA|0) + (RB).
9-51
dcbt RA, RB Load the data cache block which contains the EA
(RA|0) + (RB).
9-52
dcbtst RA,RB Load the data cache block which contains the EA
(RA|0) + (RB).
9-53
dcbz RA, RB Zero the data cache block which contains the EA
(RA|0) + (RB).
9-54
dccci RA, RB Invalidate the data cache congruence class associated
with the EA (RA|0) + (RB).
9-56
dcread RT, RA, RB Read either tag or data information from the data cache
congruence class associated with the EA (RA|0) + (RB).
Place the results in RT.
9-57
icbi RA, RB Invalidate the instruction cache block which contains the
EA (RA|0) + (RB).
9-65
icbt RA, RB Load the instruction cache block which contains the EA
(RA|0) + (RB).
9-66
iccci RA, RB Invalidate instruction cache. 9-67
icread RA, RB Read either tag or data information from the instruction
cache congruence class associated with the EA
(RA|0) + (RB).
Place the results in ICDBDR.
9-68