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Instruction Summary A-27
sthbrx RS, RA, RB Store halfword (RS)
16:31
byte-reversed in memory at
EA = (RA|0) + (RB).
MS(EA, 2)
← (RS)
24:31
|| (RS)
16:23
9-161
sthu RS, D(RA) Store halfword (RS)
16:31
in memory at
EA = (RA|0) + EXTS(D).
Update the base address,
(RA)
← EA.
9-162
sthux RS, RA, RB Store halfword (RS)
16:31
in memory at
EA = (RA|0) + (RB).
Update the base address,
(RA)
← EA.
9-163
sthx RS, RA, RB Store halfword (RS)
16:31
in memory at
EA = (RA|0) + (RB).
9-164
stmw RS, D(RA) Store consecutive words from RS through GPR(31) in
memory starting at
EA = (RA|0) + EXTS(D).
9-165
stswi RS, RA, NB Store consecutive bytes in memory starting at
EA=(RA|0).
Number of bytes n=32 if NB=0, else n=NB.
Bytes are unstacked from CEIL(n/4)
consecutive registers starting with RS.
GPR(0) is consecutive to GPR(31).
9-166
stswx RS, RA, RB Store consecutive bytes in memory starting at
EA=(RA|0)+(RB).
Number of bytes n=XER[TBC].
Bytes are unstacked from CEIL(n/4)
consecutive registers starting with RS.
GPR(0) is consecutive to GPR(31).
9-167
stw RS, D(RA) Store word (RS) in memory at
EA = (RA|0) + EXTS(D).
9-169
stwbrx RS, RA, RB Store word (RS) byte-reversed in memory at
EA = (RA|0) + (RB).
MS(EA, 4)
← (RS)
24:31
|| (RS)
16:23
||
(RS)
8:15
|| (RS)
0:7
9-170
stwcx. RS, RA, RB Store word (RS) in memory at EA = (RA|0) + (RB)
only if reservation bit is set.
if RESERVE = 1 then
MS(EA, 4)
← (RS)
RESERVE
← 0
(CR[CR0])
←
2
0 || 1 || XER
so
else
(CR[CR0])
←
2
0 || 0 || XER
so.
9-171
stwu RS, D(RA) Store word (RS) in memory at
EA = (RA|0) + EXTS(D).
Update the base address,
(RA)
← EA.
9-173
Table A-1. PPC405 Instruction Syntax Summary (continued)
Mnemonic Operands Function
Other Registers
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