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Debugging 8-15
preceding examples. The thick lines indicate that the indicated address is included in the compare
results.
Figure 8-10 shows the range selected in an exclusive DAC range address compare. Note that the
address in DAC1 is not considered part of the range, but the address in DAC2 is, along with the
highest memory address, as shown in the preceding examples.
The DAC Compare Size fields (DBCR1[D1S, D2S]) are not used by DAC range comparisons.
8.5.13.3 DAC Applied to Cache Instructions
Some cache instructions can cause DAC debug events. There are several special cases.
Table 8-2 summarizes possible DAC debug events by cache instruction:
Table 8-2. DAC Applied to Cache Instructions
Instruction
Possible DAC Debug Event
DAC-Read DAC-Write
dcba No Yes
dcbf No Yes
dcbi No Yes
dcbst No Yes
dcbt Ye s N o
dcbz No Yes
dccci No No
dcread No No
dcbtst Ye s N o
icbi Ye s No
icbt Yes No
Figure 8-9. Inclusive DAC Range Address Compares
DAC1 DAC2
0
FFFF FFFF
Figure 8-10. Exclusive DAC Range Address Compares
DAC1 DAC2
0
FFFF FFFF