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4-10 PPC405 Core User’s Manual
4.4.2 DCU Instructions
Data cache flushes and fills are triggered by load, store and cache control instructions. Cache control
instructions are provided to fill, flush, or invalidate cache blocks.
The following instructions control data cache operations.
dcba Data Cache Block Allocate
Speculatively establishes a line in the cache and marks the line as modified.
If the line is not currently in the cache, the line is established and marked as
modified without actually filling the line from external memory.
If dcba references a non-cachable address, dcba is treated as a no-op.
If dcba references a cachable address, write-through required (which would
otherwise cause an alignment exception), dcba is treated as a no-op.
dcbf Data Cache Block Flush
Flushes a line, if found in the cache and marked as modified, to external memory;
the line is then marked invalid.
If the line is found in the cache and is not marked modified, the line is marked invalid
but is not flushed.
This operation is performed regardless of whether the address is marked cachable.
dcbi Data Cache Block Invalidate
Invalidates a block, if found in the cache, regardless of whether the address is
marked cachable. Any modified data is not flushed to memory.
This is a privileged instruction.
dcbst Data Cache Block Store
Stores a block, if found in the cache and marked as modified, into external memory;
the block is not invalidated but is no longer marked as modified.
If the block is marked as not modified in the cache, no operation is performed.
This operation is performed regardless of whether the address is marked cachable.
dcbt Data Cache Block Touch
Fills a block with data, if the address is cachable and the data is not already in the
cache. If the address is non-cachable, this instruction is a no-op.
dcbtst Data Cache Block Touch for Store
Implemented identically to the dcbt instruction for compatibility with compilers and
other tools.