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Instruction Set 9-55
dcbz
Data Cache Block Set to Zero
Exceptions
An alignment exception occurs if the EA is marked as non-cachable or as write-through.
This instruction is considered a “store” with respect to data storage exceptions. See “Data Storage
Interrupt” on page 5-16.
This instruction is considered a “store” with respect to data address compare (DAC) debug
exceptions. See “Debug Interrupt” on page 5-26.
Architecture Note
This instruction is part of the IBM PowerPC Embedded Virtual Environment.