Filter
Top Products
9-138 PPC405 Core User’s Manual
nmaclhws
Negative Multiply Accumulate High Halfword to Word Saturate Signed
nmaclhws
Negative Multiply Accumulate Low Halfword to Word Saturate Signed
nprod
0:31
← –((RA)
16:31
x (RB)
16:31
) signed
temp
0:32
← nprod
0:31
+ (RT)
if ((nprod
0
= RT
0
) ∧ (RT
0
≠ temp
1
)) then (RT) ← (RT
0
||
31
(¬RT
0
))
else (RT)
← temp
1:32
The low-order halfword of RA is multiplied by the low-order halfword of RB. The negated signed
product is summed with the contents of RT and the sum is stored in a 33-bit temporary register.
If a result does not overflow, the low-order 32 bits of the temporary register are stored in RT.
If a result overflows, the returned result is the nearest representable value. Thus, if a result is less
than –2
31
, the value stored in RT is –2
31
. Likewise, if a result is greater than 2
31
– 1, the value stored
in RT is 2
31
–1.
Registers Altered
•RT
• CR[CR0]
LT, GT, EQ, SO
if Rc contains 1
• XER[SO, OV] if OE contains 1
Architecture Note
This instruction is part of the Multiply-Accumulate instruction set extensions and complies with the
architectural requirements for APUs of the IBM PowerPC Embedded Environment. As such, it is not
part of the PowerPC Architecture, nor is it part of the IBM PowerPC Embedded Environment.
Programs that use this instruction may not be portable to other implementations.
nmaclhws RT, RA, RB OE=0, Rc=0
nmaclhws. RT, RA, RB OE=0, Rc=1
nmaclhwso RT, RA, RB OE=1, Rc=0
nmachlwso. RT, RA, RB OE=1, Rc=1
4 RT RA RB OE 494 Rc
0 6 11 16 21 22 31