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Instruction Summary A-33
A.2 Instructions Sorted by Opcode
All instructions are four bytes long and word aligned. All instructions have a primary opcode field
(shown as field OPCD in Figure A-1 through Figure A-9, beginning on page A-44) in bits 0:5. Some
instructions also have a secondary opcode field (shown as field XO in Figure A-1 through Figure A-9).
PPC405 instructions, sorted by primary and secondary opcode, are listed in Table A-2.
The “Form” indicated in the table refers to the arrangement of valid field combinations within the four-
byte instruction. See “Instruction Formats,” on page A-41, for the field layouts of each form.
Form X has a 10-bit secondary opcode field, while form XO uses only the low-order 9-bits of that field.
Form XO uses the high-order secondary opcode bit (the tenth bit) as a variable; therefore, every
form XO instruction really consumes two secondary opcodes from the 10-bit secondary-opcode
space. The implicitly consumed secondary opcode is listed in parentheses for form XO instructions in
the table below.
xor RA, RS, RB XOR (RS) with (RB).
Place result in RA.
9-198
xor. CR[CR0]
xori RA, RS, IM XOR (RS) with (
16
0 || IM).
Place result in RA.
9-199
xoris RA, RS, IM XOR (RS) with (IM
||
16
0).
Place result in RA.
9-200
Table A-2. PPC405 Instructions by Opcode
Primary
Opcode
Secondary
Opcode Form Mnemonic Operands Page
3Dtwi TO, RA, IM 9-193
48 X mulhhwu RT, RA, RB 9-124
mulhhwu.
4 12 (524) XO machhwu RT, RA, RB 9-98
machhwu.
machhwuo
machhwuo.
440 X mulhhw RT, RA, RB 9-123
mulhhw.
4 44 (556) XO machhw RT, RA, RB 9-99
machhw.
machhwo
machhwo.
4 46 (558) XO nmachhw RT, RA, RB 9-135
nmachhw.
nmachhwo
nmachhwo
Table A-1. PPC405 Instruction Syntax Summary (continued)
Mnemonic Operands Function
Other Registers
Changed Page