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Code Optimization and Instruction Timings C-1
Appendix C. Code Optimization and Instruction Timings
The code optimization guidelines in “Code Optimization Guidelines” and the information describing
instruction timings in “Instruction Timings,” on page C-3 can help compiler, system, and application
programmers produce high-performance code and determine accurate execution times.
C.1 Code Optimization Guidelines
The following guidelines can help to reduce program execution times.
C.1.1 Condition Register Bits for Boolean Variables
Compilers can use Condition Register (CR) bits to store boolean variables, where 0 and 1 represent
False and True values, respectively. This generally improves performance, compared to using
General Purpose Registers (GPRs) to store boolean variables. Most common operations on boolean
variables can be accomplished using the CR Logical instructions.
C.1.2 CR Logical Instruction for Compound Branches
For example, consider the following pseudocode:
if (Var28 || Var29 || Var30 || Var 31) branch to target
Var28–Var31 are boolean variables, maintained as bits in the CR[CR7] field (CR
28:31
). The value 1
represents True; 0 represents False.
This could be coded with branches as:
bt 28, target
bt 29, target
bt 30, target
bt 31, target
Generally faster, functionally equivalent code, using CR Logical instructions, follows:
crcr 2, 28, 29
cror 2, 2, 30
cror 2, 2, 31
bt 2, target
C.1.3 Floating-Point Emulation
Two ways of handling floating-point emulation are available.
The preferred method is a call interface to subroutines in a floating-point emulation run-time library.
Alternatively, code can use the PowerPC floating point instructions. The PPC405, an integer
processor, does not recognize these instructions and will take an illegal instruction interrupt. The
interrupt handler can be written to determine the instruction opcode and execute appropriate (integer-
based) library routines to provide the equivalent function.