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DCCR
Data Cache Cacheability Register
Register Summary 10-17
DCCR
SPR 0x3FA
See “Real-Mode Storage Attribute Control” on page 7-17.
Figure 10-8. Data Cache Cachability Register (DCCR)
0 S0 0 Noncachable
1 Cachable
0x0000 0000 –0x07FF FFFF
1 S1 0 Noncachable
1 Cachable
0x0800 0000 –0x0FFF FFFF
2 S2 0 Noncachable
1 Cachable
0x1000 0000 –0x17FF FFFF
3 S3 0 Noncachable
1 Cachable
0x1800 0000 –0x1FFF FFFF
4 S4 0 Noncachable
1 Cachable
0x2000 0000 –0x27FF FFFF
5 S5 0 Noncachable
1 Cachable
0x2800 0000 –0x2FFF FFFF
6 S6 0 Noncachable
1 Cachable
0x3000 0000 –0x37FF FFFF
7 S7 0 Noncachable
1 Cachable
0x3800 0000 –0x3FFF FFFF
8 S8 0 Noncachable
1 Cachable
0x4000 0000 –0x47FF FFFF
9 S9 0 Noncachable
1 Cachable
0x4800 0000 –0x4FFF FFFF
10 S10 0 Noncachable
1 Cachable
0x5000 0000 –0x57FF FFFF
11 S11 0 Noncachable
1 Cachable
0x5800 0000 –0x5FFF FFFF
12 S12 0 Noncachable
1 Cachable
0x6000 0000 –0x67FF FFFF
13 S13 0 Noncachable
1 Cachable
0x6800 0000 –0x6FFF FFFF
14 S14 0 Noncachable
1 Cachable
0x7000 0000 –0x77FF FFFF
15 S15 0 Noncachable
1 Cachable
0x7800 0000 –0x7FFF FFFF
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
S0
S1
S2
S3
S6S4 S30
S31S5
S8 S10 S12 S14
S7 S9 S11 S13 S15
S16 S18 S20 S22 S24 S26 S28
S17 S19 S21 S23 S25 S27 S29