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9-80 PPC405 Core User’s Manual
lhz
Load Halfword and Zero
lhz
Load Halfword and Zero
EA ← (RA|0) + EXTS(D)
(RT)
←
16
0 || MS(EA,2)
An effective address (EA) is formed by adding a displacement to a base address. The displacement is
obtained by sign-extending the 16-bit D field to 32 bits. The base address is 0 if the RA field is 0 and
is the contents of register RA otherwise.
The halfword at the EA is extended to 32 bits by concatenating 16 0-bits to its left. The result is placed
into register RT.
Registers Altered
•RT
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
lhz RT, D(RA)
40 RT RA D
0 6 11 16 31