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8-12 PPC405 Core User’s Manual
8.5.10 Trap Taken Debug Event
This debug event occurs before execution of a trap instruction where the conditions are such that the
trap will occur. When trap is enabled for a debug event, external debug mode is enabled, internal
debug mode is enabled with MSR[DE] enabled, or debug wait mode is enabled, a trap instruction will
not cause a program exception.
8.5.11 Unconditional Debug Event
This debug event occurs immediately upon being set by the JTAG debug port or the
XXX_cpuUncondDebugEvent signal.
8.5.12 IAC Debug Event
This debug event occurs before execution of an instruction at an address that matches an address
defined by the Instruction Address Compare Registers (IAC1–IAC4). DBCR0[IA1, IA2, IA3, IA4]
enable IAC debug events IAC can be defined as an exact address comparison to one of the IAC
n
registers or on a range of addresses to compare defined by a pair of IAC
n
registers.
8.5.12.1 IAC Exact Address Compare
In this mode each IAC
n
register specifies an exact address to compare. These are enabled by setting
DBCR0[IA
n
] = 1 and disabling IAC range compare (DBCR0[IA12X] = 0 for IAC1 and IAC2 and
DBCR0[IA23X] = 0 for IAC3 and IAC4). The corresponding DBSR[IA
n
] bit displays the results of the
debug event.
8.5.12.2 IAC Range Address Compare
In this mode a pair of IAC
n
registers are used to define a range of addresses to compare:
Range 1:2 corresponds to IAC1 and IAC2
Range 3:4 corresponds to IAC3 and IAC4
To enable Range 1:2, DBCR0[IA12] = 1 and DBCR0[IA1] or DBCR0[IA2] =1. An IAC event will be
seen on the DBSR[IA
n
] field that corresponds to the enabled DBCR0[IA
n
] field. If DBCR0[IA1] and
DBCR0[IA2] are enabled, the results of the event are reported on both DBSR fields. Setting
DBCR0[IA12] =1 prohibits IAC1 and IAC2 from being used for exact address compares.
To enable Range 3:4, DBCR0[IA34] = 1 and DBCR0[IA3] or DBCR0[IA4] =1. An IAC event will be
seen on the DBSR[IA
n
] field that corresponds to the enabled DBCR0[IA
n
] field. If DBCR0[IA3] and
DBCR0[IA4] are enabled, the results of the event will be reported on both DBSR fields. Setting
DBCR0[IA34] =1 prohibits IAC3 and IAC4 from being used for exact address compares.
Ranges can be defined as inclusive, as shown in the preceding examples, or exclusive, using
DBCR0[IA12X] (corresponding to range 1:2) and DBCR0[IA34X] (corresponding to range 3:4), as
follows:
DBCR0[IA12] = 1: Range 1:2 = IAC1 ≤ range < IAC2.
DBCR0[IA12X] = 1: Range 1:2 = Range low < IAC1 or IAC2 ≤ Range high
DBCR0[IA34] = 1: Range 3:4 = IAC3 ≤ range < IAC4.
DBCR0[IA34X] = 1: Range 3:4 = Range low < IAC3 or IAC4 ≤ Range high