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Index X-5
when controlled by TLB 7-6
engineering note
ESR bits 5-13
eqv 9-62
eqv. 9-62
ESR 10-23
ESR (Exception Status Register)
usage for program interrupts 5-20
ESR (Exception Syndrome Register)
clearing privileged exceptions 2-31
engineering note 5-13
illustrated 5-11
MCI bit, behavior of 5-12
EVPR 10-25
EVPR (Exception Vector Prefix Register)
illustrated 5-10
Exception Syndrome Register.
See
ESR
Exception Vector Prefix Register.
See
EVPR
exceptions
defined 5-1
handling, and MSR bits 2-31
privileged, clearing 2-31
registers during debug exceptions 5-26
exceptions.
See also
interrupts
execution mode
controlling by MSR 2-31
execution synchronization, defined 2-35
extended memonics
beqlr 9-31
extended menmonics
blectrl 9-27
bnlctrl 9-28
extended mnemonicd
bngla 9-24
extended mnemonics
alphabetical B-9
bctr 9-27
bctrl 9-27
bdnz 9-21
bdnza 9-21
bdnzf 9-21
bdnzfa 9-21
bdnzfkr 9-31
bdnzfl 9-21
bdnzfla 9-21
bdnzflrl 9-31
bdnzl 9-21
bdnzla 9-21
bdnzlr 9-31
bdnzlrl 9-31
bdnzt 9-21
bdnzta 9-21
bdnztl 9-21
bdnztla 9-21
bdnztlr 9-31
bdnztlrl 9-31
bdz 9-21
bdza 9-21
bdzf 9-22
bdzfa 9-22
bdzfl 9-22
bdzfla 9-22
bdzflr 9-31
bdzflrl 9-31
bdzl 9-21
bdzla 9-21
bdzlr 9-31
bdzlrl 9-31
bdzt 9-22
bdzta 9-22
bdztl 9-22
bdztla 9-22
bdztlr 9-31
bdztlrl 9-31
beq 9-22
beqa 9-22
beqctr 9-27
beqctrl 9-27
beql 9-22
beqlrl 9-31
bf 9-22
bfa 9-22
bfctr 9-27
bfctrl 9-27
bfl 9-22
bfla 9-22
bflr 9-32
bflrl 9-32
bge 9-23
bgea 9-23
bgectr 9-27
bgectrl 9-27
bgel 9-23
bgela 9-23
bgelr 9-32
bgelrl 9-32
bgt 9-23
bgta 9-23
bgtctr 9-27
bgtctrl 9-27
bgtl 9-23
bgtla 9-23
bgtlr 9-32
bgtlrl 9-32
ble 9-23
blea 9-23
blectr 9-27
blel 9-23
blela 9-23
blelr 9-32
blelrl 9-32
blr 9-30
blrl 9-30
blt 9-23
blta 9-23
bltctr 9-27
bltctrl 9-27
bltl 9-23
bltla 9-23
bltlr 9-32
bltlrl 9-32
bne 9-24