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9-194 PPC405 Core User’s Manual
twi
Trap Word Immediate
(SRR0)
← address of twi instruction
(SRR1)
← (MSR)
(ESR[PTR])
← 1
(DBSR[TIE,IDE])
← 1,1
(MSR[WE, EE, PR, DR, IR])
← 0
PC
← EVPR
0:15
|| 0x0700
Registers Altered
• None
Programming Note
This instruction is inserted into the execution stream by a debugger to implement breakpoints, and is
not typically used by application code.
Architecture Note
This instruction is part of the PowerPC User Instruction Set Architecture.
Table 9-35. Extended Mnemonics for twi
Mnemonic Operands Function
Other Registers
Altered
tweqi RA, IM Trap if (RA) equal to EXTS(IM).
Extended mnemonic for
twi 4,RA,IM
twgei RA, IM Trap if (RA) greater than or equal to EXTS(IM).
Extended mnemonic for
twi 12,RA,IM
twgti RA, IM Trap if (RA) greater than EXTS(IM).
Extended mnemonic for
twi 8,RA,IM
twlei RA, IM Trap if (RA) less than or equal to EXTS(IM).
Extended mnemonic for
twi 20,RA,IM
twlgei RA, IM Trap if (RA) logically greater than or equal to
EXTS(IM).
Extended mnemonic for
twi 5,RA,IM
twlgti RA, IM Trap if (RA) logically greater than EXTS(IM).
Extended mnemonic for
twi 1,RA,IM
twllei RA, IM Trap if (RA) logically less than or equal to EXTS(IM).
Extended mnemonic for
twi 6,RA,IM
twllti RA, IM Trap if (RA) logically less than EXTS(IM).
Extended mnemonic for
twi 2,RA,IM
twlngi RA, IM Trap if (RA) logically not greater than EXTS(IM).
Extended mnemonic for
twi 6,RA,IM