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Instructions by Category B-29
B.5 Storage Reference Instructions
The PPC405 uses load and store instructions to transfer data between memory and the general
purpose registers. Load and store instructions operate on byte, halfword and word data. The storage
reference instructions also support loading or storing multiple registers, character strings, and byte-
reversed data. Table B-6 shows the storage reference instructions available for use in the PPC405.
Table B-6. Storage Reference Instructions
Mnemonic Operands Function
Other Registers
Changed Page
lbz RT, D(RA) Load byte from EA = (RA|0) + EXTS(D) and pad left
with zeroes,
(RT)
←
24
0 || MS(EA,1).
9-71
lbzu RT, D(RA) Load byte from EA = (RA|0) + EXTS(D) and pad left
with zeroes,
(RT)
←
24
0 || MS(EA,1).
Update the base address,
(RA)
← EA.
9-72
lbzux RT, RA, RB Load byte from EA = (RA|0) + (RB) and pad left with
zeroes,
(RT)
←
24
0 || MS(EA,1).
Update the base address,
(RA)
← EA.
9-73
lbzx RT, RA, RB Load byte from EA = (RA|0) + (RB) and pad left with
zeroes,
(RT)
←
24
0 || MS(EA,1).
9-74
lha RT, D(RA) Load halfword from EA = (RA|0) + EXTS(D) and sign
extend,
(RT)
← EXTS(MS(EA,2)).
9-75
lhau RT, D(RA) Load halfword from EA = (RA|0) + EXTS(D) and sign
extend,
(RT)
← EXTS(MS(EA,2)).
Update the base address,
(RA)
← EA.
9-76
lhaux RT, RA, RB Load halfword from EA = (RA|0) + (RB) and sign
extend,
(RT)
← EXTS(MS(EA,2)).
Update the base address,
(RA)
← EA.
9-77
lhax RT, RA, RB Load halfword from EA = (RA|0) + (RB) and sign
extend,
(RT)
← EXTS(MS(EA,2)).
9-78
lhbrx RT, RA, RB Load halfword from EA = (RA|0) + (RB), then reverse
byte order and pad left with zeroes,
(RT)
←
16
0 || MS(EA+1,1) || MS(EA,1).
9-79
lhz RT, D(RA) Load halfword from EA = (RA|0) + EXTS(D) and pad
left with zeroes,
(RT)
←
16
0 || MS(EA,2).
9-80