Filter
Top Products
5-46 Vol. 3
PROTECTION
If execute disable bit capability is not enabled or not available, reserved bit checking
in 64-bit mode includes bit 63 and additional bits. This and reserved bit checking for
legacy 32-bit paging modes are shown in
Table 5-10.
Table 5-8. IA-32e Mode Page Level Protection Matrix with Execute-Disable Bit
Capability Enabled
Mode Paging Mode Check Bits
32-bit 4-KByte paging (non-PAE) No reserved bits checked
PSE36 - PDE, 4-MByte page Bit [21]
PSE36 - PDE, 4-KByte page No reserved bits checked
PSE36 - PTE No reserved bits checked
PAE - PDP table entry Bits [63:MAXPHYADDR] & [8:5] & [2:1] *
PAE - PDE, 2-MByte page Bits [62:MAXPHYADDR] & [20:13] *
PAE - PDE, 4-KByte page Bits [62:MAXPHYADDR] *
PAE - PTE Bits [62:MAXPHYADDR] *
64-bit PML4E Bits [51:MAXPHYADDR] *
PDPTE Bits [51:MAXPHYADDR] *
PDE, 2-MByte page Bits [51:MAXPHYADDR] & [20:13] *
PDE, 4-KByte page Bits [51:MAXPHYADDR] *
PTE Bits [51:MAXPHYADDR] *
NOTES:
* MAXPHYADDR is the maximum physical address size and is indicated by
CPUID.80000008H:EAX[bits 7-0].