Filter
Top Products
6-46 Vol. 3
INTERRUPT AND EXCEPTION HANDLING
Interrupt 11—Segment Not Present (#NP)
Exception Class Fault.
Description
Indicates that the present flag of a segment or gate descriptor is clear. The processor
can generate this exception during any of the following operations:
• While attempting to load CS, DS, ES, FS, or GS registers. [Detection of a not-
present segment while loading the SS register causes a stack fault exception
(#SS) to be generated.] This situation can occur while performing a task switch.
• While attempting to load the LDTR using an LLDT instruction. Detection of a not-
present LDT while loading the LDTR during a task switch operation causes an
invalid-TSS exception (#TS) to be generated.
• When executing the LTR instruction and the TSS is marked not present.
• While attempting to use a gate descriptor or TSS that is marked segment-not-
present, but is otherwise valid.
An operating system typically uses the segment-not-present exception to implement
virtual memory at the segment level. If the exception handler loads the segment and
returns, the interrupted program or task resumes execution.
A not-present indication in a gate descriptor, however, does not indicate that a
segment is not present (because gates do not correspond to segments). The oper
-
ating system may use the present flag for gate descriptors to trigger exceptions of
special significance to the operating system.
A contributory exception or page fault that subsequently referenced a not-present
segment would cause a double fault (#DF) to be generated instead of #NP.
Exception Error Code
An error code containing the segment selector index for the segment descriptor that
caused the violation is pushed onto the stack of the exception handler. If the EXT flag
is set, it indicates that the exception resulted from either:
• an external event (NMI or INTR) that caused an interrupt, which subsequently
referenced a not-present segment
• a benign exception that subsequently referenced a not-present segment
The IDT flag is set if the error code refers to an IDT entry. This occurs when the IDT
entry for an interrupt being serviced references a not-present gate. Such an event
could be generated by an INT instruction or a hardware interrupt.
Saved Instruction Pointer
The saved contents of CS and EIP registers normally point to the instruction that
generated the exception. If the exception occurred while loading segment descrip
-