Intel 253668-032US Webcam User Manual


 
9-50 Vol. 3
PROCESSOR MANAGEMENT AND INITIALIZATION
There are no optional functions. BIOS must load the appropriate update for each
processor during system initialization.
A Header Version of an update block containing the value 0FFFFFFFFH indicates that
the update block is unused and available for storing a new update.
The BIOS is responsible for providing a region of non-volatile storage (NVRAM) for
each potential processor stepping within a system. This storage unit consists of one
or more update blocks. An update block is a contiguous 2048-byte block of memory.
The BIOS for a single processor system need only provide update blocks to store one
microcode update. If the BIOS for a multiple processor system is intended to support
mixed processor steppings, then the BIOS needs to provide enough update blocks to
store each unique microcode update or for each processor socket on the OEM’s
system board.
The BIOS is responsible for managing the NVRAM update blocks. This includes
garbage collection, such as removing microcode updates that exist in NVRAM for
which a corresponding processor does not exist in the system. This specification only
provides the mechanism for ensuring security, the uniqueness of an entry, and that
stale entries are not loaded. The actual update block management is implementation
specific on a per-BIOS basis.
As an example, the BIOS may use update blocks sequentially in ascending order with
CPU signatures sorted versus the first available block. In addition, garbage collection
may be implemented as a setup option to clear all NVRAM slots or as BIOS code that
searches and eliminates unused entries during boot.
NOTES
For IA-32 processors starting with family 0FH and model 03H and
Intel 64 processors, the microcode update may be as large as 16
KBytes. Thus, BIOS must allocate 8 update blocks for each microcode
update. In a MP system, a common microcode update may be
sufficient for each socket in the system.
For IA-32 processors earlier than family 0FH and model 03H, the
microcode update is 2 KBytes. An MP-capable BIOS that supports
multiple steppings must allocate a block for each socket in the system.
A single-processor BIOS that supports variable-sized microcode
update and fixed-sized microcode update must allocate one 16-KByte
region and a second region of at least 2 KBytes.
The following algorithm (Example 9-11) describes the steps performed during BIOS
initialization used to load the updates into the processor(s). The algorithm assumes:
The BIOS ensures that no update contained within NVRAM has a header version
or loader version that does not match one currently supported by the BIOS.
The update contains a correct checksum.
The BIOS ensures that (at most) one update exists for each processor stepping.
Older update revisions are not allowed to overwrite more recent ones.