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Vol. 3 8-53
MULTIPLE-PROCESSOR MANAGEMENT
8.9.3.1 Hierarchical ID of Logical Processors with x2APIC ID
Table 8-3 shows an example of possible x2APIC ID assignments for a dual processor
system that support x2APIC. Each physical package providing four processor cores,
and each processor core also supporting Intel Hyper-Threading Technology. Note that
the x2APIC ID need not be contiguous in the system.
Table 8-2. Initial APIC IDs for the Logical Processors in a System that has Two
Physical Processors Supporting Dual-Core and Intel Hyper-Threading Technology
Initial APIC ID Package ID Core ID SMT ID
0H 0H 0H 0H
1H 0H 0H 1H
2H 0H 1H 0H
3H 0H 1H 1H
4H 1H 0H 0H
5H 1H 0H 1H
6H 1H 1H 0H
7H 1H 1H 1H
Table 8-3. Example of Possible x2APIC ID Assignment in a System that has Two
Physical Processors Supporting x2APIC and Intel Hyper-Threading Technology
x2APIC ID Package ID Core ID SMT ID
0H 0H 0H 0H
1H 0H 0H 1H
2H 0H 1H 0H
3H 0H 1H 1H
4H 0H 2H 0H
5H 0H 2H 1H
6H 0H 3H 0H
7H 0H 3H 1H
10H 1H 0H 0H
11H 1H 0H 1H
12H 1H 1H 0H
13H 1H 1H 1H
14H 1H 2H 0H