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Vol. 3 8-55
MULTIPLE-PROCESSOR MANAGEMENT
a. Query the right-shift value for the SMT level of the topology using CPUID leaf
0BH with ECX =0H as input. The number of bits to shift-right on x2APIC ID
(EAX[4:0]) can distinguish different higher-level entities above SMT (e.g.
processor cores) in the same physical package. This is also the width of the
bit mask to extract the SMT_ID.
b. Query CPUID leaf 0BH for the amount of bit shift to distinguish next higher-
level entities (e.g. physical processor packages) in the system. This describes
an explicit three-level-topology situation for commonly available processors.
Consult
Example 8-17 to adapt to situations beyond three-level topology of a
physical processor. The width of the extraction bit mask can be used to derive
the cumulative extraction bitmask to extract the sub IDs of logical processors
(including different processor cores) in the same physical package. The
extraction bit mask to distinguish merely different processor cores can be
derived by xor’ing the SMT extraction bit mask from the cumulative
extraction bit mask.
c. Query the 32-bit x2APIC ID for the logical processor where the current thread
is executing.
d. Derive the extraction bit masks corresponding to SMT_ID, CORE_ID, and
PACKAGE_ID, starting from SMT_ID.
e. Apply each extraction bit mask to the 32-bit x2APIC ID to extract sub-field
IDs.
4. If the processor does not support CPUID leaf 0BH, each initial APIC ID contains
an 8-bit value, the topology enumeration parameters needed to derive extraction
bit masks are:
a. Query the size of address space for sub IDs that can accommodate logical
processors in a physical processor package. This size parameters
(CPUID.1:EBX[23:16]) can be used to derive the width of an extraction
bitmask to enumerate the sub IDs of different logical processors in the same
physical package.
b. Query the size of address space for sub IDs that can accommodate processor
cores in a physical processor package. This size parameters can be used to
derive the width of an extraction bitmask to enumerate the sub IDs of
processor cores in the same physical package.
c. Query the 8-bit initial APIC ID for the logical processor where the current
thread is executing.
d. Derive the extraction bit masks using respective address sizes corresponding
to SMT_ID, CORE_ID, and PACKAGE_ID, starting from SMT_ID.
e. Apply each extraction bit mask to the 8-bit initial APIC ID to extract sub-field
IDs.