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Vol. 3 6-55
INTERRUPT AND EXCEPTION HANDLING
— The U/S flag indicates whether the processor was executing at user mode (1)
or supervisor mode (0) at the time of the exception.
— The RSVD flag indicates that the processor detected 1s in reserved bits of the
page directory, when the PSE or PAE flags in control register CR4 are set to 1.
Note:
• The PSE flag is only available in recent Intel 64 and IA-32 processors
including the Pentium 4, Intel Xeon, P6 family, and Pentium processors.
• The PAE flag is only available on recent Intel 64 and IA-32 processors
including the Pentium 4, Intel Xeon, and P6 family processors.
• In earlier IA-32 processors, the bit position of the RSVD flag is reserved
and is cleared to 0.
— The I/D flag indicates whether the exception was caused by an instruction
fetch. This flag is reserved and cleared to 0 if CR4.PAE = 0 (32-bit paging is
in use) or IA32_EFER.NXE= 0 (the execute-disable feature is either
unsupported or not enabled). See
Section 4.7, “Page-Fault Exceptions,” for
details.
• The contents of the CR2 register. The processor loads the CR2 register with the
32-bit linear address that generated the exception. The page-fault handler can
use this address to locate the corresponding page directory and page-table
entries. Another page fault can potentially occur during execution of the page-
fault handler; the handler should save the contents of the CR2 register before a
Figure 6-9. Page-Fault Error Code
The fault was caused by a non-present page.
The fault was caused by a page-level protection violation.
The access causing the fault was a read.
The access causing the fault was a write.
The access causing the fault originated when the processor
was executing in supervisor mode.
The access causing the fault originated when the processor
was executing in user mode.
31
0
Reserved
123
4
The fault was not caused by reserved bit violation.
The fault was caused by reserved bits set to 1 in a page directory.
P
0
1
W/R
0
1
U/S
0
RSVD
0
1
1
I/D
I/D
0
The fault was not caused by an instruction fetch.
1
The fault was caused by an instruction fetch.
P
W/R
U/S
RSVD