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16-50 Vol. 3
DEBUGGING, PROFILING BRANCHES AND TIME-STAMP COUNTER
16.11.2 IA32_TSC_AUX Register and RDTSCP Support
Processor based on Intel microarchitecture (Nehalem) provides an auxiliary TSC
register, IA32_TSC_AUX that is designed to be used in conjunction with IA32_TSC.
IA32_TSC_AUX provides a 32-bit field that is initialized by privileged software with a
signature value (for example, a logical processor ID).
The primary usage of IA32_TSC_AUX in conjunction with IA32_TSC is to allow soft-
ware to read the 64-bit time stamp in IA32_TSC and signature value in
IA32_TSC_AUX with the instruction RDTSCP in an atomic operation. RDTSCP returns
the 64-bit time stamp in EDX:EAX and the 32-bit TSC_AUX signature value in ECX.
The atomicity of RDTSCP ensures that no context switch can occur between the reads
of the TSC and TSC_AUX values.
Support for RDTSCP is indicated by CPUID.80000001H:EDX[27]. As with RDTSC
instruction, non-ring 0 access is controlled by CR4.TSD (Time Stamp Disable flag).
User mode software can use RDTSCP to detect if CPU migration has occurred
between successive reads of the TSC. It can also be used to adjust for per-CPU differ-
ences in TSC values in a NUMA system.