Filter
Top Products
Vol. 3 8-35
MULTIPLE-PROCESSOR MANAGEMENT
8.5 INTEL
®
HYPER-THREADING TECHNOLOGY AND
INTEL
®
MULTI-CORE TECHNOLOGY
Intel Hyper-Threading Technology and Intel multi-core technology are extensions to
Intel 64 and IA-32 architectures that enable a single physical processor to execute
two or more separate code streams (called threads) concurrently. In Intel Hyper-
Threading Technology, a single processor core provides two logical processors that
share execution resources (see
Section 8.7, “Intel
®
Hyper-Threading Technology
Architecture”). In Intel multi-core technology, a physical processor package provides
two or more processor cores. Both configurations require chipsets and a BIOS that
support the technologies.
Software should not rely on processor names to determine whether a processor
supports Intel Hyper-Threading Technology or Intel multi-core technology. Use the
CPUID instruction to determine processor capability (see
Section 8.6.2, “Initializing
Multi-Core Processors”).
8.6 DETECTING HARDWARE MULTI-THREADING
SUPPORT AND TOPOLOGY
Use the CPUID instruction to detect the presence of hardware multi-threading
support in a physical processor. Hardware multi-threading can support several vari-
eties of multigrade and/or Intel Hyper-Threading Technology. CPUID instruction
provides several sets of parameter information to aid software enumerating topology
information. The relevant topology enumeration parameters provided by CPUID
include:
• Hardware Multi-Threading feature flag (CPUID.1:EDX[28] = 1) —
Indicates when set that the physical package is capable of supporting Intel
Hyper-Threading Technology and/or multiple cores.
• Processor topology enumeration parameters for 8-bit APIC ID:
— Addressable IDs for Logical processors in the same Package
(CPUID.1:EBX[23:16]) — Indicates the maximum number of addressable
ID for logical processors in a physical package. Within a physical package,
there may be addressable IDs that are not occupied by any logical
processors. This parameter does not represents the hardware capability of
the physical processor.
2
• Addressable IDs for processor cores in the same Package
3
(CPUID.(EAX=4, ECX=0
4
):EAX[31:26] + 1 = Y) — Indicates the maximum
2. Operating system and BIOS may implement features that reduce the number of logical proces-
sors available in a platform to applications at runtime to less than the number of physical pack-
ages times the number of hardware-capable logical processors per package.