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Vol. 3A xliii
CONTENTS
PAGE
Table A-15. List of Metrics Available for Replay Tagging
(For Replay Event Only)A-206
Table A-16. Event Mask Qualification for Logical Processors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-208
Table A-17. Performance Monitoring Events on Intel
®
Pentium
®
M
ProcessorsA-214
Table A-18. Performance Monitoring Events Modified on Intel
®
Pentium
®
M Processors . . A-216
Table A-19. Events That Can Be Counted with the P6 Family Performance-
Monitoring CountersA-218
Table A-20. Events That Can Be Counted with Pentium Processor
Performance-Monitoring CountersA-235
Table B-1. CPUID Signature Values of DisplayFamily_DisplayModel. . . . . . . . . . . . . . . . . . . . . . . .B-1
Table B-2. IA-32 Architectural MSRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-3
Table B-3. MSRs in Processors Based on Intel Core Microarchitecture. . . . . . . . . . . . . . . . . . . . .B-38
Table B-4. MSRs in Intel Atom Processor Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-58
Table B-5. MSRs in Processors Based on Intel Microarchitecture (Nehalem) . . . . . . . . . . . . . . .B-73
Table B-6. MSRs in the Pentium 4 and Intel Xeon Processors. . . . . . . . . . . . . . . . . . . . . . . . . . . . .B-96
Table B-7. MSRs Unique to 64-bit Intel Xeon Processor MP with
Up to an 8 MB L3 CacheB-136
Table B-8. MSRs Unique to Intel Xeon Processor 7100 Series . . . . . . . . . . . . . . . . . . . . . . . . . . B-138
Table B-9. MSRs in Intel Core Solo, Intel Core Duo Processors, and Dual-Core Intel Xeon
Processor LVB-139
Table B-10. MSRs in Pentium M Processors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-153
Table B-11. MSRs in the P6 Family Processors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-162
Table B-12. MSRs in the Pentium Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-174
Table C-1. Boot Phase IPI Message Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . C-2
Table E-1. CPUID DisplayFamily_DisplayModel Signatures for Family 6 . . . . . . . . . . . . . . . . . . . . E-1
Table E-2. Incremental Decoding Information: Processor Family 06H
Machine Error Codes For Machine CheckE-2
Table E-3. CPUID DisplayFamily_DisplayModel Signatures for Processors Based on Intel Core
MicroarchitectureE-5
Table E-4. Incremental Bus Error Codes of Machine Check for Processors Based on Intel Core
MicroarchitectureE-6
Table E-5. Incremental MCA Error Code Types for Intel Xeon Processor 7400. . . . . . . . . . . . . . E-9
Table E-6. Type B Bus and Interconnect Error Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-10
Table E-7. Type C Cache Bus Controller Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-10
Table E-8. QPI Machine Check Error codes for IA32_MC0_STATUS and IA32_MC1_STATUSE-12
Table E-9. QPI Machine Check Error codes for IA32_MC0_MISC and IA32_MC1_MISC. . . . . . .E-13
Table E-10. Machine Check Error codes for IA32_MC7_STATUS. . . . . . . . . . . . . . . . . . . . . . . . . . . .E-13
Table E-11. Incremental Memory Controller Error Codes of Machine Check for IA32_MC8_STATUS
E-14
Table E-12. Incremental Memory Controller Error Codes of Machine Check for IA32_MC8_MISCE-
15
Table E-13. Incremental Decoding Information: Processor Family 0FH
Machine Error Codes For Machine CheckE-15
Table E-14. MCi_STATUS Register Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-17
Table E-15. Incremental MCA Error Code for Intel Xeon Processor MP 7100. . . . . . . . . . . . . . . .E-18
Table E-16. Other Information Field Bit Definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-20
Table E-17. Type A: L3 Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-21
Table E-18. Type B Bus and Interconnect Error Codes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-22
Table E-19. Type C Cache Bus Controller Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E-23
Table E-20. Decoding Family 0FH Machine Check Codes for Cache Hierarchy Errors. . . . . . . . .E-24
Table F-1. EOI Message (14 Cycles) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . F-1