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Vol. 3 15-47
MACHINE-CHECK ARCHITECTURE
• When the OVER flag in the IA32_MCi_STATUS register is set for the SRAR error
(VAL=1, UC=1, EN=1, PCC=0, S=1 and AR=1), the MCE handler cannot take
recovery action as the information of the SRAR error in the IA32_MCi_STATUS
register was potentially lost due to the overflow condition. Since the recovery
action for SRAR errors must be taken, the MCE handler must signal the operating
system to reset the system.
• When the MCE handler cannot find any uncorrected (VAL=1, UC=1 and EN=1) or
any software recoverable errors (VAL=1, UC=1, EN=1, PCC=0 and S=1) in any
of the IA32_MCi banks of the processors, this is an unexpected condition for the
MCE handler and the handler should signal the operating system to reset the
system.
• Before returning from the machine-check exception handler, software must clear
the MCIP flag in the IA32_MCG_STATUS register. The MCIP flag is used to detect
recursion. The machine-check architecture does not support recursion. When the
processor receives a machine check when MCIP is set, it automatically enters the
shutdown state.
Example 15-4 gives pseudocode for an MC exception handler that supports
recovery of UCR.
Example 15-4. Machine-Check Error Handler Pseudocode Supporting UCR
MACHINE CHECK HANDLER: (* Called from INT 18 handler *)
NOERROR = TRUE;
ProcessorCount = 0;
IF CPU supports MCA
THEN
RESTARTABILITY = TRUE;
IF (Processor Family = 6 AND Display_Model >= 0EH) OR (Processor Family > 6)
THEN
MCA_BROADCAST = TRUE;
Acquire SpinLock;
ProcessorCount++; (* Allowing one logical processor at a time to examine machine check
registers *)
CALL MCA ERROR PROCESSING; (* returns RESTARTABILITY and NOERROR *)
ELSE
MCA_BROADCAST = FALSE;
(* Implement a rendezvous mechanism with the other processors if necessary *)
CALL MCA ERROR PROCESSING;
FI;
ELSE (* Pentium(R) processor compatible *)
READ P5_MC_ADDR
READ P5_MC_TYPE;
RESTARTABILITY = FALSE;
FI;
IF NOERROR = TRUE
THEN
IF NOT (MCG_RIPV = 1 AND MCG_EIPV = 0)
THEN