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13-16 Vol. 3
SYSTEM PROGRAMMING FOR INSTRUCTION SET EXTENSIONS AND PROCESSOR
XSAVE, XRSTOR instructions operating on FP or SSE state will cause a #NM Device
Not Available) exception, if CR0.TS is set. Using this feature, system software can
implement the “lazy restore” technique of managing x87 FPU/SSE state using either
FXSAVE/FXRSTOR or XSAVE/XRSTOR. It can be accomplished even with the inter-
mixing of FXSAVE and XSAVE instructions.
Table 13-4. XRSTOR Action on MXCSR, x87 FPU, XMM Register
EDX:EAX XSTATE_BV MXCSR XMM Registers x87 FPU State
Bit 1 Bit 0 Bit 1 Bit 0
0 0 X X None None None
0 1 X 0 None None Init by processor
0 1 X 1 None None Load
1 0 0 X Load/Check Init by processor None
1 0 1 X Load/Check Load None
1 1 0 0 Load/Check Init by processor Init by processor
1 1 0 1 Load/Check Init by processor Load
1 1 1 0 Load/Check Load Init by processor
1 1 1 1 Load/Check Load Load
Table 13-5. XSAVE Action on MXCSR, x87 FPU, XMM Register
EDX:EAX XCR0
1
NOTES:
1. XCR0 is the XFEATURE_ENABLED_MASK register. Note that attempts to set XCR0[0] to 0 cause
#GP.
MXCSR XMM Registers x87 FPU State
Bit 1 Bit 0 Bit 1 Bit 0
0 0 X 1 None None None
0 1 X 1 None None Store
1 0 0 1 None None None
1 0 1 1 Store Store None
1 1 0 1 None None Store
1 1 1 1 Store Store Store