Filter
Top Products
Vol. 3 6-61
INTERRUPT AND EXCEPTION HANDLING
• AC flag in the EFLAGS register is set.
• The CPL is 3 (protected mode or virtual-8086 mode).
Alignment-check exceptions (#AC) are generated only when operating at privilege
level 3 (user mode). Memory references that default to privilege level 0, such as
segment descriptor loads, do not generate alignment-check exceptions, even when
caused by a memory reference made from privilege level 3.
Storing the contents of the GDTR, IDTR, LDTR, or task register in memory while at
privilege level 3 can generate an alignment-check exception. Although application
programs do not normally store these registers, the fault can be avoided by aligning
the information stored on an even word-address.
The FXSAVE and FXRSTOR instructions save and restore a 512-byte data structure,
the first byte of which must be aligned on a 16-byte boundary. If the alignment-check
exception (#AC) is enabled when executing these instructions (and CPL is 3), a
misaligned memory operand can cause either an alignment-check exception or a
general-protection exception (#GP) depending on the processor implementation
(see “FXSAVE-Save x87 FPU, MMX, SSE, and SSE2 State” and “FXRSTOR-Restore
x87 FPU, MMX, SSE, and SSE2 State” in
Chapter 3 of the Intel® 64 and IA-32 Archi-
tectures Software Developer’s Manual, Volume 2A).
The MOVUPS and MOVUPD instructions perform 128-bit unaligned loads or stores.
The LDDQU instructions loads 128-bit unaligned data.They do not generate general-
protection exceptions (#GP) when operands are not aligned on a 16-byte boundary.
If alignment checking is enabled, alignment-check exceptions (#AC) may or may not
be generated depending on processor implementation when data addresses are not
aligned on an 8-byte boundary.
FSAVE and FRSTOR instructions can generate unaligned references, which can cause
alignment-check faults. These instructions are rarely needed by application
programs.
Exception Error Code
Yes (always zero).
Saved Instruction Pointer
The saved contents of CS and EIP registers point to the instruction that generated the
exception.
Program State Change
A program-state change does not accompany an alignment-check fault, because the
instruction is not executed.