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WORKING WITH THE CPU
MemoryManagement Unit (MMU)
114 Hardware Reference NS9215
Second-level
descriptor
The base address of the page table to be used is determined by the descriptor
returned (if any) from a first-level fetch — either a coarse page table descriptor or a
fine page table descriptor. The page table is then accessed and a second-level
descriptor returned.
Second-level
descriptor format
Second-level
descriptor pages
A second-level descriptor defines a tiny, small, or large page descriptor, or is
invalid:
A large page descriptor provides the base address of a 64 KB block of memory.
A small page descriptor provides the base address of a 4 KB block of memory.
31 14 13 0
Translation base
1
Translation table base
31 1413 0
Translation base
2
Table index 0 0
31 2019 0
Table index Section index
Section first-level descriptor
31 2019 0
Section base address
2
01
1345
SBZ DomainAP 1 C B0
31 2019 0
Section base address
Physical address
Section index
8
31 16 15 12 11 10 9 8 012345
00
0
0
1
1
11
CB
AP0Large page base address
Small page base address
Tiny page base address
76
C
C
B
B
AP0
AP
AP1
AP1
AP2
AP2
AP3
AP3
Fault
Large page
Small page
Tiny page