Digi NS9215 Computer Hardware User Manual


 
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ETHERNET COMMUNICATION MODULE
Multicast Address Filter Enable register
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Multicast High
Address Mask
Register #5
Address: A060 0AB4
Multicast High
Address Mask
Register #6
Address: A060 0AB8
Multicast High
Address Mask
Register #7
Address: A060 0ABC
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Multicast Address Filter Enable register
Address: A060 0AC0
The Multicast Address Filter Enable register individually enables each of the eight
entries in the multicast address filter logic. For an explanation of the
synchronization scheme used for this register, see “Clock synchronization” on
page 276.
Register
D15:00 R/W Default = 0x0000 0000 MFMSKH4
D31:16 R Default = 0x0000 0000 Reserved (read as 0)
D15:00 R/W Default = 0x0000 0000 MFMSKH5
D31:16 R Default = 0x0000 0000 Reserved (read as 0)
D15:00 R/W Default = 0x0000 0000 MFMSKH6
D31:16 R Default = 0x0000 0000 Reserved (read as 0)
D15:00 R/W Default = 0x0000 0000 MFMSKH7
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
MFILT
EN7
MFILT
EN6
MFILT
EN5
MFILT
EN4
MFILT
EN3
MFILT
EN2
MFILT
EN1
MFILT
EN0