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TIMING
Memory Timing
www.digiembedded.com 487
SDRAM burst
write (16 bit)
Notes:
1 This is the bank and RAS address.
2 This is the CAS address.
pre act wr d-A d-B d-C d-D d-E d-F d-G d-H
M9
M8
M7
M6
M5
M5
M4
M12
M10
Note-1 Note-2
clk_out
data<31:0>
addr
data_mask<3:2>
data_mask<1:0>*
dy_cs_n<3:0>*
ra s_n
cas_n
we_n