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SYSTEM CONTROL MODULE
System Memory Chip Select 2 Dynamic Memory Base and Mask registers
192 Hardware Reference NS9215
Registers
Register bit
assignment
System Memory Chip Select 2 Dynamic Memory Base and
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mask registers
Addresses: A090 01E0 / 01E4
These control registers set the base and mask for system memory chip select 2, with
a minimum size of 4K. The powerup default settings produce a memory range of
0x2000 0000 — 0x2FFF FFFF.
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Chip select 1 base (CS1B)
ReservedChip select 1 base (CS1B)
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Chip select 1 mask (CS1M)
ReservedChip select 1 mask (CS1M) CSD1
Bits Access Mnemonic Reset Description
D31:12 R/W CS1B 0x10000 Chip select 1 base
Base address for chip select 1
D11:00 N/A Reserved N/A N/A
D31:12 R/W CS1M 0xF0000 Chip select 1 mask
Mask or size for chip select 5
D11:01 N/A Reserved N/A N/A
D00 R/W CSD1 0x1 Chip select 1disable
0 Disable chip select
1 Enable chip select