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MEMORY CONTROLLER
StaticMemory Turn Round Delay 0–3 registers
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Register bit
assignment
To prevent bus contention on the external memory databus, the WAITTURN field
controls the number of bus turnaround cycles added between static memory read
and write accesses.
The WAITTURN field also controls the number of turnaround cycles between static
memory and dynamic memory accesses.
Bits Access Mnemonic Description
D31:04 N/A Reserved N/A (do not modify)
D03:00 R/W WTTN Bus turnaround cycles (WAITTURN)
00000–11110 (n+1)
clk_out turnaround cycles, where bus
turnaround time is (WAITTURN+1) x t
clk_out
1111 16 clk_out turnaround cycles (reset value on reset_n).