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TIMING
Memory Timing
508 Hardware Reference NS9215
SPI slave mode 0
and 1: 2-byte
transfer
Note: SPI data can be reversed such that LSB is first. Use the BITORDER bit in Serial Channel
B/A/C/D Control Register A.
SPI slave mode 2
and 3: 2-byte
transfer
Note: SPI data can be reversed such that LSB is first. Use the BITORDER bit in Serial Channel
B/A/C/D Control Register A.
MSB LSB MSB LSB
MSB LSB MSB LSB
SP6SP4
SP8SP7
S10SP5SP1
S9SP12SP12SP13SP13SP3SP0
SPI CLK Out (Mode 0)
SPI CLK Out (Mode 1)
SPI Enable
SPI Data Out
SPI Data In
MSB LSB MS B LSB
MSB LSB MSB LSB
SP6SP4
SP8SP7
S10SP5SP 1
S9SP3SP0
SPI CLK Out (Mode 2)
SPI CLK Out (Mode 3)
SPI Enabl e
SPI Data Out
SPI Data In