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WORKING WITH THE CPU
MemoryManagement Unit (MMU)
118 Hardware Reference NS9215
Translation
sequence for tiny
page references
Page translation involves one additional step beyond that of a section translation.
The first-level descriptor is the fine page table descriptor; this points to the first-
level descriptor.
Note:
The domain specified in the first-level description and access permissions
specified in the first-level description together determine whether the access
has permissions to proceed. See “Domain access control” on page 121 for
more information.
Subpages You can define access permissions for subpages of small and large pages. If, during a
page table walk, a small or large page has a different subpage permission, only the
subpage being accessed is written into the TLB. For example, a 16 KB (large page)
subpage entry is written into the TLB if the subpage permission differs, and a 64 KB
entry is put in the TLB if the subpage permissions are identical.
31 14 13 0
Translation base
1
Translation table base
31 1413 0
Translation base
2
Table index 0 0
31 2019 0
Table index Page index
First-level descriptor
31 0
Fine page table base address
2
11
1345
Domain 1
31 0
Fine page table base address
Level two
table index
10 9
Modified virtual address
81112
121112
31 109 6543210
00L2 table index
11BCAPPage base address
Page base address
31 010 9
Page index
Physical address
Second-level descriptor