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20 Hardware Reference NS9215
[Module] DMA RX Control....................................................................375
[Module] DMA RX Buffer Descriptor Pointer ..............................................376
[Module] RX Interrupt Configuration register ............................................377
[Module] Direct Mode RX Status FIFO......................................................378
[Module] Direct Mode RX Data FIFO .......................................................379
[Module] DMA TX Control....................................................................380
[Module] DMA TX Buffer Descriptor Pointer ..............................................381
[Module] TX Interrupt Configuration register ............................................381
[Module] Direct Mode TX Data FIFO .......................................................382
[Module] Direct Mode TX Data Last FIFO..................................................383
Chapter 10: Serial Control Module: UART ......................... 385
Features.................................................................................385
UART module structure ...............................................................386
Normal mode operation .....................................................................386
Example configuration ................................................................386
Baud rate generator..........................................................................387
Baud rates ..............................................................................387
Hardware-based flow control...............................................................388
Character-based flow control (XON/XOFF) ...............................................388
Example configuration ................................................................388
Forced character transmission .............................................................388
Force character transmission procedure...........................................389
Collecting feedback ...................................................................389
ARM wakeup on character recognition ....................................................389
Example configuration ................................................................389
Wrapper Control and Status registers .....................................................390
Register address map .................................................................390
Wrapper Configuration register ............................................................391
Interrupt Enable register ....................................................................393
Interrupt Status register.....................................................................395
Receive Character GAP Control register ..................................................398
Receive Buffer GAP Control register ......................................................399
Receive Character Match Control register................................................399
Receive Character-Based Flow Control register .........................................400
Force Transmit Character Control register ...............................................402
ARM Wakeup Control register...............................................................403
Transmit Byte Count .........................................................................404
UART Receive Buffer .........................................................................405
UART Transmit Buffer........................................................................405
UART Baud Rate Divisor LSB ................................................................406
UART Baud Rate Divisor MSB................................................................406
UART Interrupt Enable register.............................................................407
UART Interrupt Identification register ....................................................408