Digi NS9215 Computer Hardware User Manual


 
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I2C MASTER/SLAVE INTERFACE
I2C command interface
www.digiembedded.com 449
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I
2
C command interface
The I
2
C module converts parallel (8-bit) data to serial data and serial data to
parallel data between the processor and the I
2
C bus, using a set of interface
registers.
The primary interface register for transmitting data is the
CMD_TX_DATA_REG
(write-only).
The primary interface register for receiving data is the
STATUS_RX_DATA_REG
(read-only).
Locked interrupt
driven mode
I
2
C operates in a locked interrupt driven mode, which means that each command
issued must wait for an interrupt response before the next command can be issued
(illustrated in "Flow charts," beginning on page 457).
The first bit of the command — 0 or 1 — indicates to which module — master or
slave, respectively — the command in the CMD field (of the CMD_TX_DATA_REG) is
sent. The master module can be sent a master command only; the slave module can
be sent a slave command only (see "Master module and slave module commands,"
beginning on page 449, for a list of commands). If a command is sent to the master
module, that module is locked until a command acknowledgement is given.
Similarly, if a command is sent to the slave module, the slave module is locked until
it receives a command acknowledgement. With either module, the
acknowledgement can be any interrupt associated with that module. When a
module is locked, another command must not be sent to that module.
The command lock status can be checked in the
STATUS_RX_DATA_REG.
Master module
and slave module
commands
The I
2
C master recognizes four high-level commands, which are used in the CMD
field of the Command register; the I
2
C slave recognizes two high-level commands:
Bus arbitration Any
M_READ or M_WRITE command causes the I
2
C module to participate in the bus
arbitration process when the I
2
C bus is free (idle). If the module becomes the new
Command Name Description
0x0 M_NOP No operation.
0x4 M_READ Start reading bytes from slave.
0x5 M_WRITE Start writing bytes to slave.
0x6 M_STOP Stop this transaction (give up the I
2
C bus).
0x10 S_NOP No operation. This command is necessary for 16-bit
mode, providing data in
TX_DATA_REG without a
command.
0x16 S_STOP Stop transaction by not acknowledging the byte
received.