Digi NS9215 Computer Hardware User Manual


 
SYSTEM CONTROL MODULE
Interrupt Status Raw
178 Hardware Reference NS9215
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Interrupt Status Raw
Address: A090 016C
The Interrupt Status Raw register shows all current interrupt requests.
Register
Register bit
assignment
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Software Watchdog Configuration
Address: A090 0174
The Software Watchdog Configuration register configures the software watchdog
timer operation.
Register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Interrupt status raw (ISRAW)
Interrupt status raw (ISRAW)
Bits Access Mnemonic Reset Description
D31:00 R ISRAW 0x0 Interrupt status raw
Provides the status of all active, enabled, and
disabled interrupt request levels, where bit 0 is for
the interrupt assigned to level 0, bit 1 is for the
interrupt assigned to level 1, and so on through bit 31
for the interrupt assigned to level 31.
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
SWTCS
De
bug
Re
serv
ed
SW
WIC
SW
WI
Re
serv
ed
SW
WE