Filter
Top Products
SYSTEM CONTROL MODULE
AHB Bus Activity Status
190 Hardware Reference NS9215
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
AHB Bus Activity Status
Address: A090 022C
The AHB Bus Activity Status register is a read-only register that determines the
activity on the AHB bus.
Register
Register bit
assignment
System Memory Chip Select 0 Dynamic Memory Base and
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mask registers
Addresses: A090 01D0 / 01D4
D01 R/W UART A 0x0 UART A wakeup
0 Do not wake on character match
1 Wake on character match
D00 R/W Enet 0x0 Ethernet wakeup
0 Do not wake on Ethernet packet
1 Wake on Ethernet packet
Bits Access Mnemonic Reset Description
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Act stat
Act stat
Bits Access Mnemonic Reset Description
D31:00 R Act stat 0x0 Bus activity status
Provides the CPU with the status of activity on the
system bus, excluding the CPU. This register can be
used to help determine when to enter sleep mode or
to reduce the system clock frequencies.
The counter is reset each time a master accesses the
AHB bus. The counter will saturate at all 1s.