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MEMORY CONTROLLER
Dynamic Memory Precharge Command Period register
238 Hardware Reference NS9215
Register
Register bit
assignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Dynamic Memory Precharge Command Period register
Address: A070 0030
The Dynamic Memory Precharge Command Period register allows you to program the
precharge command period, t
RP
. Modify this register only during system
initialization. This value normally is found in SDRAM datasheets as t
RP
.
Note:
The Dynamic Memory Precharge Command Period register is used for all four
dynamic memory chip selects. The worst case value for all chip selects must
be programmed.
Register
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved
RD
Bits Access Mnemonic Description
D31:02 N/A Reserved N/A (do not modify)
D01:00 R/W RD Read data strategy
00 Reserved.
01 Command delayed strategy, using
CLKDELAY (command
delayed, clock out not delayed).
10 Command delayed strategy plus one clock cycle, using
CLKDELAY (command delayed, clock out not delayed).
11 Command delayed strategy plus two clock cycles, using
CLKDELAY (command delayed, clock out not delayed).
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
Reserved RP