Digi NS9215 Computer Hardware User Manual


 
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ETHERNET COMMUNICATION MODULE
MII Management Indicators register
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Register
Register bit
assignment
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MII Management Indicators register
Address: A060 0434
Register
Register bit
assignment
Reserved
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
MRDD
Bits Access Mnemonic Reset Description
D31:16 N/A Reserved N/A N/A
D15:00 R MRDD 0x0000 MII read data
Read data is obtained by reading from this register
after an MII Management read cycle. An MII
Management read cycle is executed by loading the
MII Management Address register, then setting the
READ bit to 1 in the MII Management Command
register. Read data is available after the BUSY bit in
the MII Management Indicators register returns to 0.
Reserved
MIILF BUSY
13121110987654321015 14
31 29 28 27 26 25 24 23 22 21 20 19 18 17 1630
Reserved
N
VALID
SCAN
Bits Access Mnemonic Reset Description
D31:04 N/A Reserved N/A N/A
D03 R MIILF 0 MII link failure
When set to 1, indicates that the PHY currently has a
link fail condition.